Published Last updated

Regime Awareness Technology Component Roadmap


Regime Awareness is Tegrity.AI’s concrete technology and operational capability for detecting when the operating conditions, assumptions or control structures behind a system’s recent behaviour are becoming invalid.

It is being developed as a minimal, domain-agnostic capability that can be adapted across environments where cascading effects, structural fragility and regime shifts matter, including AI systems, industrial operations, supply chains, cybersecurity, finance, logistics and critical infrastructures.

Its core function is to help systems identify when the conditions behind their recent behaviour are no longer valid, so that guardrails, buffers and decision boundaries can be adjusted before instability propagates.

This matters because most current systems are optimised for stable conditions. They often perform well until the underlying regime changes, at which point models, thresholds, controls and assumptions can quickly become invalid. In many cases, the problem is not the absence of prediction, but the absence of Regime Awareness.

Regime Awareness is designed to be minimal, explainable and implementation-oriented, open and interoperable across domains rather than tied to a single vendor, industry or architecture.


Our intention is for Regime Awareness to become:

  • an implementable technology and operational capability for real systems
  • a common benchmark for comparing approaches to Regime Awareness and cascading-effect management
  • an open-source foundation for future research, pilots and operational deployments
  • a shared language across disciplines working on resilience, safety, governance and operational integrity

The roadmap is structured in five phases, most of which run in parallel:

Status as of 13 September 2026. These are Tegrity.AI programme states, not third-party certifications.

Tegrity.AI Regime Awareness programme phase status as of 13 September 2026 RUN IN PARALLEL 1 · Formalisation COMPLETE 2 · Validation IN PROGRESS — CURRENT PRIORITY 3 · Research & Technology IN PROGRESS 5 · Publication & Standards IN PROGRESS 4 · Organisational Pilot PLANNED end-to-end, on live operations results feed back into phases 2 and 3 Phase 2 is stated as running in parallel with phases 3 and 5. No dates or durations are declared: this is a status and dependency view, not a schedule.
Fig. — Declared status of the five phases. Phases 1, 2, 3 and 5 are stated as running in parallel; the Organisational Pilot is the one phase still planned, and its results are stated to feed back into phases 2 and 3.

1. Regime Awareness Formalisation — Complete

Define the system boundaries, operating assumptions, detection conditions and falsifiable research questions for Regime Awareness. See the current formal statement in Minimalistic Regime-Aware Early Warning Systems.

2. Regime Awareness Validation — In Progress, Current Priority

Strengthen theoretical validation, demonstrate the independence of the mechanism and design the evaluation method through subcomponent validation with QAVA/UV and independent evaluators where applicable. The hypotheses and tests currently being validated are H1–H3 of the Regime-Aware Semantic Windows mathematical validation. Running in parallel with phases 3 and 5.

Validation notebook · H1–H3 · pilots

Inspectable engineering aids

Open any plate at full resolution. Hypotheses, evidence tracks and pilot gates remain explicitly separated.

Experimental architecture with a common data and baseline spine and separate H1 safety, H2 downstream-model and H3 compute-efficiency claim panels.
H1–H3 validation architecture. A leakage firewall, common baselines and separate acceptance tests prevent a positive result in one lane from validating another.
Closed-loop safety-governor architecture from semantic window and current posture through authorised action, non-inferiority gate and operational feedback.
Sufficiently Good Safety Governor. The selector qualifies present context; authorised responses must pass the pointwise non-inferiority gate before bounded action.
Evidence matrix linking independent H1, H2 and H3 claims to separated QAVA, Swiss mathematics, Innosuisse and TalTech assessment tracks and a four-gate pilot progression.
Validation and pilot evidence architecture. Four assessment tracks return different evidence; progression runs from controlled replay to shadow mode, bounded field action and transfer.
Inspectable pseudocode for causal semantic-base selection, bounded Safety Governor action and a time-ordered H1, H2 and H3 evaluation harness.
Reference pseudocode. Implementation-neutral contracts expose the selector, response gate and leakage-aware validation harness without presenting unvalidated production code.

3. Research and Technology Development — In Progress

Develop the proposed RUP Estonia programme, technical architecture, detection mechanisms and prototype implementations.

4. Organisational Pilot — Planned

Deploy the Regime Awareness detection capability within participating organisations’ operating environments, to validate performance under production conditions rather than laboratory or academic settings. This is distinct from the subcomponent validation carried out in phase 2: here the capability is tested end-to-end, on live operations, with organisations that run it. Pilots will be organised around defined questions, prototypes and evaluation criteria rather than open-ended engagements, and results will feed directly back into phases 2 and 3.

5. Publication and Standards Contribution – In Progress

Publish technical papers, reference materials and selected open implementations, and translate relevant findings into contributions to international standards and policy discussions. Current public outputs and their institutional routes are indexed under Research Contributions.